PN

Peter Nelson

Semis & AI HW | Engineer in Residence @ Factorial Funds | ex-NVIDIA

San Francisco, California, United States · 1 connection

Factorial Funds

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About

Semis & AI HW | Engineer in Residence @ Factorial Funds | ex-NVIDIA

Experience

Principal ASIC Design EngineerNVIDIA
Jan 2008 to Feb 2023

Education

Carnegie Mellon University
Master's degree Electrical & Computer Engineering
2007 to 2007
Carnegie Mellon University
Bachelor's degree Electrical & Computer Engineering
2003 to 2007